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Logic & Puzzles

If a digital circuit's output simplifies via De Morgan's laws from NOT(A AND B) to (NOT A) OR (NOT B), which consequence follows for test vectors?

A)Reduced power consumption occurs
B)The circuit's delay increases slightly
C)Timing margin analysis becomes simpler
D)Fewer test vectors are required

💡 Explanation

Simplifying with De Morgan's Law means fewer logic gates are needed to realize the same boolean function, therefore requiring fewer test vectors for complete fault coverage, because testing each gate individually becomes unnecessary; rather than requiring exhaustive testing of all combinations, the reduced complexity allows focused test cases.

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