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Which risk increases when electrostatic discharge destroys gate capacitance?

A)Latch-up and device malfunction
B)Increased system clock jitter
C)Unintended antenna inductance boost
D)Higher reverse voltage avalanche

💡 Explanation

Latch-up results from parasitic bipolar transistors triggered by overvoltage breaking gate capacitance; because gate capacitance fails, increased current flow induces latch-up, therefore causing malfunction rather than jitter, avalanche or inductance changes.

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